How Three-Dimensional Transistors Went from Lab to Fab

In Intel’s new design the silicon channel is raised like a fin, so that the gate contacts it from three sides. (Large graphic next page.)
Credit: Technology Review

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How Three-Dimensional Transistors Went from Lab to Fab

Intel's new three-dimensional transistor design, announced early this week, is the culmination of more than a decade of research and development work that began in a lab at the University of California, Berkeley in 1999.
The 22-nanometer transistors, which Intel says will make chips 37 percent faster and half as power hungry, will be used for every element on the company's 22-nanometer scale chips, including both the logic and memory circuits. Processors that use the "tri-gate" transistors have been demonstrated in working systems, and the company will begin volume production in the second half of this year. It's unclear just how device-makers will take advantage of the chips, but they're likely to enable improved battery life and greater sophistication for portable devices, as well as faster processing for desktops and servers.
Intel turned to the new design because existing designs have begun running up against a performance roadblock. Conventional transistors are made up of a metal structure called a gate that's mounted on top of a flat channel of silicon. The gate controls the flow of current through the channel from a source electrode to a drain electrode. With every generation of chips, the channel has gotten smaller and smaller, enabling companies like Intel to make faster chips by packing in more transistors. But it has become more difficult for the gate to fully cut off the flow of current. Leaky transistors that don't turn off completely waste power.
The tri-gate transistors use rectangular silicon channels that stick up from the surface of the chip, allowing the gate to contact the channel on three sides, instead of just one. This more intimate contact means the gate can turn the transistor off nearly completely even at the 22-nanometer scale, which is responsible for the energy-efficiency gains in Intel's new chips. It's also possible to make tri-gate transistors with more than one silicon channel connected to each gate in order to increase the amount of current that can flow through each transistor, enabling higher performance.

Intel didn't invent this transistor design, but the company is the first to get it into production. If the company had stuck with planar transistors in the move from 32- to 22-nanometer transistors, the chips would have demonstrated 20 to 30 percent gains in efficiency and performance, says industry analyst Linley Gwennap. There had been speculation that the company would use the new transistor design for memory elements and not logic, and so not completely eliminate the planar transistors. By using the tri-gate technology for both memory and logic, says Gwennap, "Intel is really surging for the fences and seeing a large improvement in performance, which could be a huge advantage" over its competitors.